CD4046BE CAPTURE VERSUS TRACKING — campaign104
Manual analog5Vexperiment. No MCU/firmware is required or supplied. No hardware measurements supplied.
Read the complete circuit/article before use. CD4046BE N/PDIP16 only; CT470pF between6/7, notground. Single5Vsource, all returns common. Selector chooses ONE of manual/PC I/PC II; never tie outputs2/13. Generator terminal14 must be measured0..5V and valid CMOS levels. Use high-impedance scope probes.
On a computer with Python3:
python pll_filter_lab.py
python pll_filter_lab.py --trace
python test_filter_lab.py
Calculator: ideal XOR average, unloadedRCstep/tolerance and operator-entered finite-window observation policy. NOT a CD4046B/VCO/capture/lock physicalsimulation. No capture bandwidth is predicted. Graphs are constructed arithmetic.
Keep worksheet blank until actual qualified bench observations. Capture and tracking trials need different declaredinitial conditions. Equal average frequencies alone do not prove phase lock.
